/*
Copyright (C) 2021-2025 Casa Xu (also Zhiyan Xu) from HIT

This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
as published by the Free Software Foundation; either version 2
of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
*/

/*
 * LOS_MAX14830.h
 *
 *  Created on: 2022年6月20日
 *      Author: 64435
 */

#ifndef PERIPHERAL_LAYER_INC_LOS_MAX14830_H_
#define PERIPHERAL_LAYER_INC_LOS_MAX14830_H_

#include "LOS_SYS.h"

#define CS_MAX1 CS_0
#define CS_MAX2 CS_1

#define LOS_MAX14830_NUM1 1
#define LOS_MAX14830_NUM2 2
#define LOS_MAX14830_NUMMAX 2

#define MAX14830_RHR_REG          0x00
#define MAX14830_THR_REG          0x00
#define MAX14830_IRQEn_REG        0x01
#define MAX14830_ISR_REG          0x02
#define MAX14830_LSRIntEn_REG     0x03
#define MAX14830_LSR_REG          0x04
#define MAX14830_SpclChrIntEn_REG 0x05
#define MAX14830_SpclCharInt_REG  0x06
#define MAX14830_STSIntEn_REG     0x07
#define MAX14830_STSInt_REG       0x08
#define MAX14830_MODE1_REG        0x09
#define MAX14830_MODE2_REG        0x0A
#define MAX14830_LCR_REG          0x0B
#define MAX14830_RxTimeOut_REG    0x0C
#define MAX14830_HDplxDelay_REG   0x0D
#define MAX14830_IrDA_REG         0x0E
#define MAX14830_FlowLvl_REG      0x0F
#define MAX14830_FIFOTrgLvl_REG   0x10
#define MAX14830_TxFIFOLvl_REG    0x11
#define MAX14830_RxFIFOLvl_REG    0x12
#define MAX14830_FlowCtrl_REG     0x13
#define MAX14830_XON1_REG         0x14
#define MAX14830_XON2_REG         0x15
#define MAX14830_XOFF1_REG        0x16
#define MAX14830_XOFF2_REG        0x17
#define MAX14830_GPIOConfig_REG   0x18
#define MAX14830_GPIOData_REG     0x19
#define MAX14830_PLLConfig_REG    0x1A
#define MAX14830_BRGConfig_REG    0x1B
#define MAX14830_DIVLSB_REG       0x1C
#define MAX14830_DIVMSB_REG       0x1D
#define MAX14830_ClkSource_REG    0x1E
#define MAX14830_GlobalIRQ_REG    0x1F
#define MAX14830_GlobalComnd_REG  0x1F

#define MAX14830_WRITE 0x80
#define MAX14830_READ  0x00

#define MAX14830_CLKSRC_CRYST_BIT   (1 << 1)
#define MAX14830_CLKSRC_PLL_BIT     (1 << 2)
#define MAX14830_CLKSRC_PLLBYP_BIT  (1 << 3)
#define MAX14830_CLKSRC_EXTCLK_BIT  (1 << 4)
#define MAX14830_CLKSRC_CLK2RTS_BIT (1 << 7)

#define MAX14830_EXTREG_ENBL 0xCE
#define MAX14830_EXTREG_DSBL 0xCD

#define MAX14830_IRQ_LSRErrIEn_BIT    (1 << 0)
#define MAX14830_IRQ_SpclChrIEn_BIT   (1 << 1)
#define MAX14830_IRQ_STSIEn_BIT       (1 << 2)
#define MAX14830_IRQ_RFifoTrgIEn_BIT  (1 << 3)
#define MAX14830_IRQ_TFifoTrgIEn_BIT  (1 << 4)
#define MAX14830_IRQ_TFifoEmtyIEn_BIT (1 << 5)
#define MAX14830_IRQ_RFifoEmtyIEn_BIT (1 << 6)
#define MAX14830_IRQ_CTSIEn_BIT       (1 << 7)


#define MAX14830_MODE1_RXDIS_BIT        (1 << 0)
#define MAX14830_MODE1_TXDIS_BIT        (1 << 1)
#define MAX14830_MODE1_TXHIZ_BIT        (1 << 2)
#define MAX14830_MODE1_RTSHIZ_BIT       (1 << 3)
#define MAX14830_MODE1_TRANSCVCTRL_BIT  (1 << 4)
#define MAX14830_MODE1_IRQSEL_BIT       (1 << 7)

#define MAX14830_MODE2_RST_BIT       (1 << 0)
#define MAX14830_MODE2_FIFORST_BIT   (1 << 1)
#define MAX14830_MODE2_RXTRIGINV_BIT (1 << 2)
#define MAX14830_MODE2_RXEMPTINV_BIT (1 << 3)
#define MAX14830_MODE2_SPCHR_BIT     (1 << 4)
#define MAX14830_MODE2_LOOPBACK_BIT  (1 << 5)
#define MAX14830_MODE2_MULTIDROP_BIT (1 << 6)
#define MAX14830_MODE2_ECHOSURP_BIT  (1 << 7)


#define MAX14830_LCR_STOPLEN_BIT     (1 << 2)
#define MAX14830_LCR_PARITY_BIT      (1 << 3)
#define MAX14830_LCR_EVENPARITY_BIT  (1 << 4)
#define MAX14830_LCR_FORCEPARITY_BIT (1 << 5)
#define MAX14830_LCR_TXBREAK_BIT     (1 << 6)
#define MAX14830_LCR_RTS_BIT         (1 << 7)
#define MAX14830_LCR_WORD_LEN5 0x00
#define MAX14830_LCR_WORD_LEN6 0x01
#define MAX14830_LCR_WORD_LEN7 0x02
#define MAX14830_LCR_WORD_LEN8 0x03

#define MAX14830_IrDA_RTSInvert  (1 << 2)

#define LOS_SPI_MAX14830 LOS_SPI_NUM5




void LOS_MAX14830_Check(uint16_t CS);
uint8_t LOS_MAX14830_Init(uint8_t MAX14830_NUM);
void LOS_MAX14830_WriteRegister(uint8_t MAX14830_NUM, uint8_t port, uint8_t addr, uint8_t data);
uint8_t LOS_MAX14830_ReadRegister(uint8_t MAX14830_NUM, uint8_t port, uint8_t addr);
uint8_t LOS_MAX14830_IsCurMinError(uint32_t clk, uint32_t *min_error);
uint8_t LOS_MAX14830_SelectRefClk(uint8_t MAX14830_NUM, uint8_t port, uint32_t xtal_clk);
uint32_t LOS_MAX14830_WriteBytes(uint8_t MAX14830_NUM, uint8_t port, uint8_t* data, uint16_t len);
uint32_t LOS_MAX14830_ReadBytes(uint8_t MAX14830_NUM, uint8_t port, uint8_t* data, uint16_t len);
uint8_t LOS_MAX14830_WaitReady(uint8_t MAX14830_NUM);
uint8_t LOS_MAX14830_SetMode(uint8_t MAX14830_NUM, uint8_t port);
uint8_t LOS_MAX14830_SetBaud(uint8_t MAX14830_NUM, uint8_t port, uint32_t baud);
uint8_t LOS_MAX14830_DisableCLK(uint8_t MAX14830_NUM, uint8_t port);
uint8_t LOS_MAX14830_EnableCLK(uint8_t MAX14830_NUM, uint8_t port);
uint8_t LOS_MAX14830_EnableIRQ(uint8_t MAX14830_NUM, uint8_t port);
uint8_t LOS_MAX14830_InitModule(uint8_t MAX14830_NUM, uint8_t port);
uint8_t LOS_MAX14830_Init(uint8_t MAX14830_NUM);
void LOS_MAX14830_ResetFIFO(uint8_t MAX14830_NUM, uint8_t port);
void LOS_MAX14830_MsgHandle();
void LOS_MAX14830_Shutdown();
void LOS_MAX14830_PowerOn();


#endif /* PERIPHERAL_LAYER_INC_LOS_MAX14830_H_ */
